data sheet 1 part no. package code no. publication date: january 2006 sdm00012aeb AN26261A ulga031-w-3525 maintenance/ discontinued maintenance/discontinued includes following four product lifecycle stage. planed maintenance type maintenance type planed discontinued typed discontinued type please visit following url about latest information. http://panasonic.net/sc/en
AN26261A 2 sdm00012aeb contents ? overview ?????????????????????????????????????????. 3 ? features ?????????????????????????????????????????.. 3 ? applications ???????????????????????????????????????? 3 ? package ?????????????????????????????????????????. 3 ? type ?????????????...???? ???????????????? ?????????. 3 ? application circuit example ?????????????????????????????????. 4 ? test circuit diagram ????????????????????????????????????. 5 ? pin out ????????????...??? ?????????????? ????????????. 6 ? pin descriptions ??????????????????????????????????????. 7 ? absolute maximum ratings ?????????????????????????????????. 8 ? operating supply voltage range ?????..???????????? ?????????????. 8
AN26261A 3 sdm00012aeb AN26261A transmit rf ic for wcdma (dual band) ? overview y AN26261A is wcdma transmit rfic that is pl anned to use for dual band wcdma in japan. AN26261A is consist of dir ect conversion modulator, voltage gain c ontrol amplifiers, vcos and synthesizer. there is able to build the wcdma transm it rf block with external pa, pre-driver with gain control amplifier and rf-filter. y this ic is expecting to use wi th the wcdma receive ic; an26260a. ? features y direct modulation transmit rfic for dua l band wcdma with the on-chip vcos. y transmit frequencies : 1920 mhz to 1980 mhz, 830 mhz to 855 mhz. y current consumption : 45 ma (typ.) . ? applications y wcdma single, dual band terminals. ? package y wafer level chip size package (wlcsp) . size : 2.47 3.47 0.8 mm 3 . ? type y sige monolithic bi-cmos ic.
AN26261A 4 sdm00012aeb ? application circuit example i_out_p i_out_n q_out_p q_out_n dual band rx rfic an26260a saw 26 mhz tcxo ref_clk ref_clk reset ld_out band reset ld_out band in_h_p in_h_n in_l_p in_l_n out_h_p out_h_n out_l_p out_l_n duplexer duplexer sw i_in_p i_in_n q_in_p q_in_n balun balun driver pa saw saw balun balun saw dual band tx rfic AN26261A lna an26210a i_out_p i_out_n q_out_p q_out_n dual band rx rfic an26260a saw 26 mhz tcxo ref_clk ref_clk reset ld_out band reset ld_out band in_h_p in_h_n in_l_p in_l_n out_h_p out_h_n out_l_p out_l_n duplexer duplexer sw i_in_p i_in_n q_in_p q_in_n balun balun driver pa saw saw balun balun saw dual band tx rfic AN26261A lna an26210a
AN26261A 5 sdm00012aeb ? test circuit diagram (top view) out_h 1 pf 1 pf ehf2be1900 ehf2be0920 sden sclk sdata vga_cnt e6 a7 c7 d6 b6 c6 d7 a6 e5 d5 b5 c5 a5 e4 d4 b4 c4 e3 d3 b3 c3 a4 e7 d2 b2 c2 a3 e1 d1 a1 c1 220 pf 2700 pf murata grm155b11h272 vih, vil, iih, iil vih, vil, iih, iil vih, vil, iih, iil 1 pf cmos_vcc ref_clk ref_vcc pd_vcc reset ld_out band lo_vcc q_in_n q_in_p i_in_n i_in_p mod_vcc vga_vcc 82 h 22 f 22 f 0.1 f 100 pf 82 h 22 f 22 f 0.1 f 100 pf 22 f 22 f 0.1 f 100 pf 0.47 f 22 f 0.1 f 100 pf 22 f 22 f 0.1 f 100 pf 82 h 82 h 22 f 22 f 82 h 0.1 f 100 pf 4 pf 2.2 nh 2.2 nh 1 pf 1 pf 3 pf 8 pf 12 nh 12 nh out_l out_h_n rf_sub q_in_p i_in_p q_in_n lo_vcc mod_vcc vco_fil out_h_p vga_vcc band i_in_n n.c. out_l_n vga_cnt lo_gnd sden out_l_p sclk n.c. pd_vcc ld_out rf_gnd sdata ref_vcc reset cmos_gnd cmos_vcc pd_gnd ref_clk pll_fil voh, vol, ioh, iol voh, vol, ioh, iol voh, vol, ioh, iol out_h 1 pf 1 pf ehf2be1900 ehf2be0920 sden sclk sdata vga_cnt e6 e6 a7 a7 c7 c7 d6 d6 b6 b6 c6 c6 d7 d7 a6 a6 e5 e5 d5 d5 b5 b5 c5 c5 a5 a5 e4 e4 d4 d4 b4 b4 c4 c4 e3 e3 d3 d3 b3 b3 c3 c3 a4 a4 e7 e7 d2 d2 b2 b2 c2 c2 a3 a3 e1 e1 d1 d1 a1 a1 c1 c1 220 pf 2700 pf murata grm155b11h272 vih, vil, iih, iil vih, vil, iih, iil vih, vil, iih, iil 1 pf cmos_vcc ref_clk ref_vcc pd_vcc reset ld_out band lo_vcc q_in_n q_in_p i_in_n i_in_p mod_vcc vga_vcc 82 h 22 f 22 f 0.1 f 100 pf 82 h 22 f 22 f 0.1 f 100 pf 22 f 22 f 0.1 f 100 pf 0.47 f 22 f 0.1 f 100 pf 22 f 22 f 0.1 f 100 pf 82 h 82 h 22 f 22 f 82 h 0.1 f 100 pf 4 pf 2.2 nh 2.2 nh 1 pf 1 pf 3 pf 8 pf 12 nh 12 nh out_l out_h_n rf_sub q_in_p i_in_p q_in_n lo_vcc mod_vcc vco_fil out_h_p vga_vcc band i_in_n n.c. out_l_n vga_cnt lo_gnd sden out_l_p sclk n.c. pd_vcc ld_out rf_gnd sdata ref_vcc reset cmos_gnd cmos_vcc pd_gnd ref_clk pll_fil out_h_n rf_sub q_in_p i_in_p q_in_n lo_vcc mod_vcc vco_fil out_h_p vga_vcc band i_in_n n.c. out_l_n vga_cnt lo_gnd sden out_l_p sclk n.c. pd_vcc ld_out rf_gnd sdata ref_vcc reset cmos_gnd cmos_vcc pd_gnd ref_clk pll_fil voh, vol, ioh, iol voh, vol, ioh, iol voh, vol, ioh, iol
AN26261A 6 sdm00012aeb top view ? pin out e6 a7 c7 d6 b6 c6 d7 a6 e5 d5 b5 c5 a5 e4 d4 b4 c4 e3 d3 b3 c3 a4 e7 d2 b2 c2 a3 e1 d1 a1 c1 out_h_n rf_sub q_in_p i_in_p q_in_n lo_vcc mod_vcc vco_fil out_h_p vga_vcc band i_in_n n.c. out_l_n vga_cnt lo_gnd sden out_l_p sclk n.c. pd_vcc ld_out rf_gnd sdata ref_vcc reset cmos_gnd cmos_vcc pd_gnd ref_clk pll_fil the figure below shows pin layout is ? top view ?.
AN26261A 7 sdm00012aeb ? pin descriptions description type pin name pin no. rf ground ground rf_gnd e7 2 ghz band negative output out out_h_n e6 800 mhz band positive output out out_l_p e3 cmos logic ground ground cmos_gnd e1 serial clock input in sclk d3 serial data input in sdata d2 cmos logic supply supply cmos_vcc d1 q channel baseband positive input in q_in_p c7 local supply supply lo_vcc c6 i channel baseband negative input in i_in_n c5 serial enable in sden c4 phase detector supply supply pd_vcc c3 2 ghz band positive output out out_h_p e5 800 mhz band negative output out out_l_n e4 modulator supply supply mod_vcc d7 i channel baseband positive input in i_in_p d6 variable gain cont rol amplifier supply supply vga_vcc d5 variable gain control amplifier control voltage input in vga_cnt d4 reference clock amplifier supply supply ref_vcc c2 reference clock input in ref_clk c1 q channel baseband negative input in q_in_n b6 band selector output out band b5 local ground ground lo_gnd b4 no connection or ground ? n.c. b3 pll loop filter inout pll_fil b2 rf substrate ground rf_sub a7 vco ripple filter inout vco_fil a6 no connection or ground ? n.c. a5 synthesizer lock detector output out ld_out a4 reset signal input in reset a3 phase detector ground ground pd_gnd a1
AN26261A 8 sdm00012aeb ? absolute maximum ratings ? operating supply voltage range *1,*4 v 0 to v cc + 0.3 and less than 3.6 vi dc input voltage 6 *3 c ?55 to +125 t stg storage temperature 5 *1, *5 v ?2 to 2 vid i,q dc differential input voltage 7 *1 v 0 to 3.6 v cc supply voltage 1 ? ma 64.5 i cc supply current 2 notes unit rating symbol parameter a no. *3 c ?25 to +85 t opr operating ambient temperature 4 *2 mw 59.8 p d power dissipation 3 note) *1: the supply voltage is shown the value under the condition which not exceeds the absolute maximum ratings and the power dissipation. *2: the power dissipation is shown the value at t a = 85 c for the independent (non-mounted) ic package without a heat sink. in case of use this ic, please refer to the p d -t a diagram of the package standard and use under the condition not exceeding the allowable value. *3: except for the power dissipation, operating ambient temp erature, and storage temperature, all ratings are for t a = 25 c. *4: sclk, sdata, sden, reset, ref_clk, i_in _p, i_in_n, q_in_p, q_in_n, vga_cnt pins. *5: i_in_p to i_in_n or q_in_p to q_in_n differential input voltage. notes unit range symbol parameter ? v 2.7 to 3.0 v cc supply voltage range
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